RNAFCAPB02-DC

Advanced FPGA Computer Architecture Prototyping Boards(Dual FPGA Cores)

Features

• Customer choice of Twin Xilinx XC200S/XC300S SPARTAN-II device with interlocked Ios
• On board JTAG mapped to parallel port for easy programmability from the PC to any FPGA
• XC18V00 (512Kbits or 1MBits) Xilinx jtag Programmable ROM, mapped in slave serial with JTAG connectivity for on board programming to one FPGA
• External parallel programming port socket , can be used by a processor for FPGA configuration
• 100 MHz low jitter programmable oscillator
• Header IOs.
• Power bus chaining connector
• Power supply chord with positive Digital or supply regulators.
• Shared and Dedicated memory banks to both FPGAs
• Dedicated Processor interface and Parallel port Interface

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